Driven by the demand for AI, the HBM market has continued to show strong demand, which has led to a rapid increase in the penetration rates of DDR5 and LPDDR. In order to expand their market share, major manufacturers are actively adjusting the production capacities of DRAM and NAND to respond to the constantly changing market demands. With the promotion of HBM products, the memory market still holds expansion potential in terms of capital expenditure, output, and revenue.
However, the uncertainty of global tariff policies has impacted the end market, resulting in a more pronounced tug-of-war in the pricing negotiation process. In the face of this challenge, manufacturers need to strategically adjust their pricing and supply chain management to maintain an advantage in a highly competitive environment. Overall, the future development of the memory market presents positive potential, but ongoing attention must be paid to how external policies affect pricing and supply.

The DRAM market is currently facing numerous challenges. On the supply side, the rise of China has brought more players into the arena. Leveraging geographic advantages, these new entrants are steadily expanding their market share year by year, and their future impact cannot be underestimated.
In addition, the advent of AI and the increasing demand for HBM have consumed more production capacity, adding further complexity to capacity planning. Furthermore, mobile DRAM is extending its reach into notebooks and AI applications, making capacity allocation even more difficult. Therefore, this analysis will focus specifically on capacity planning.

With stacking layer increasing from 4hi to 8hi, 12hi, 16hi and even 20hi, HBM process technologies regarding TSV, TC-NCF, MR-MUF and hybrid bonding is being developed. Key process steps include temporary bonding, etching, grinding, pressure annealing, underfill, mass reflow, thermal compression molding. For instance, gap between each layer is becoming narrower, posting challenges for liquidity of underfill. Increasing process complexity of HBM will boost demand for equipment with cutting-edge technology.
Bit density of each HBM chip is expanded by development of mono die density and stacking layer. Increasing 2.5D packaging size also help boost number of HBM chips per AI chip. From NVIDIA's Hopper, Blackwell to Rubin platform, number of HBM chips per AI chip increase from six to eight and even twelve. 2.5D packaging technologies such as FOPLP (Fan-out Panel Level Packaging) is planned to be adopted, with glass core substrate and glass interposer also being studied in the long-term roadmap.

With the development of advanced technologies such as higher-layer 3D NAND, the enormous investments in R&D and fabs will continue to ramp up the financial pressure on suppliers. Dramatic fluctuations in market conditions and geopolitical risks have also resulted in uncertainties in decisions regarding CapEx. All the while, disequilibrium in market activities has become the norm for the NAND Flash industry. Excessive supply in the past led to collapses of prices, while a rebound of demand (e.g. increase of storage capacity among AI, data centers, and smartphones) could then lead to excessive demand. Uncertainties from demand for consumer electronics, together with the fluctuating demand for enterprise SSD, and Chinese suppliers’ aggressive expansions, are hindering suppliers’ with their precise projections and flexible capacity adjustments. A lack of effective management on market activities would generate severe price fluctuations, thus serving as a detrimental factor in impacting profitability and stability of the industry.